Eyeq4 Datasheet | 2026 |

The EyeQ4 datasheet is a testament to Mobileye's commitment to advancing the field of autonomous driving and AI. As the industry continues to evolve, we can expect to see further developments and innovations in the EyeQ4 SoC, enabling new applications and use cases. With its high-performance processing, advanced computer vision, and machine learning capabilities, the EyeQ4 is poised to play a critical role in shaping the future of autonomous driving and AI.

Supports Road Experience Management (REM) for high-definition mapping harvesting. Safety Alerts:

The PMA and VMP accelerators run highly optimized neural networks that detect: eyeq4 datasheet

: Implements 6 VMP cores . These function as Very Long Instruction Word (VLIW) and Single Instruction Multiple Data (SIMD) vector machines optimized for short integral datatypes common in vision algorithms and neural network operations.

Despite a low TDP (3-5W), the datasheet warns about localized hotspots near the VMP accelerators. A thermal pad and a small copper spreader are mandatory for ambient temperatures above 85°C. The EyeQ4 datasheet is a testament to Mobileye's

The EyeQ4 is a milestone in Mobileye's processor lineup. Introduced in 2015 and mass-produced in 2018, it was engineered to bridge the gap between advanced driver assistance (ADAS) and full autonomy (L3). A key innovation is its heterogeneous computing architecture, which combines multiple specialized processor types to maximize visual data processing efficiency while keeping power consumption minimal.

: Built-in 2× 128MB Flash memory channels running in a redundant arrangement for automotive safe boot and firmware integrity. Vehicle Networking & Connectivity Mobileye EyeQ4 Vision Processor Family - Yole Group Despite a low TDP (3-5W), the datasheet warns

| Specification | Details | | :--- | :--- | | | 28nm FD-SOI (Fully Depleted Silicon On Insulator) by STMicroelectronics | | Total Compute Cores | 14 cores in total (4 CPU cores + 10 specialized accelerators) | | CPU Cores | 32-bit MIPS InterAptiv cores (5 total; 4x I-class, 1x M-class) clocked at ~1 GHz | | Vector Accelerators | 6x Vector Microcode Processors (VMP) : For mature, efficient vision tasks, proven in EyeQ2 and EyeQ3. | | Novel Accelerators | 2x Multithreaded Processing Clusters (MPC) : Versatile accelerators for complex vision algorithms, more energy-efficient than a GPU for specific tasks. 2x Programmable Macro Arrays (PMA) : Delivers compute density near that of fixed-function hardware but with full programmability. | | Memory Support | LPDDR4 memory; detailed specifications for power rails (e.g., DDR 1.1V) are available in official design guidelines. |